PMC-Sierra Introduces Industry’s Highest Density Dual Channel 6Gb/s SERDES

November 29, 2010 by | Comments

PMC-Sierra, Inc. (Nasdaq:PMCS), the premier Internet infrastructure
semiconductor solution provider, today announced availability of its
SynthePHY(TM) family of integrated dual channel 6Gb/s SERDES and
programmable clock synthesizer solutions optimized for wireless
infrastructure radio designs. The SynthePHY products offer 30 clock
outputs that can be programmed over a wide frequency band, ranging from
3MHz to 1.6GHz and meet the phase noise performance required by
multi-carrier GSM, WCDMA and LTE systems.

“Wireless infrastructure OEMs are under tremendous pressure to lower
their development costs by reducing the number of RF product variants,”
said Tom Sun, vice president and general manager for PMC-Sierra’s
Broadband Wireless Division. “Our SynthePHY family is highly
programmable and designed to meet the rigorous phase noise performance
and wideband support required for next generation multi-standard radio
platform designs.”

With each new generation of equipment, base station radios are required
to provide more functionality, with lower power, in the same
form-factor. PMC-Sierra’s SynthePHY replaces up to four components by
integrating dual 6Gb/s SERDES, jitter cleaner, on-chip voltage
controlled oscillator, clock synthesizer and 30 programmable clock
drivers (Fig. 1). It requires only 2200mW to operate all functions at
their maximum rates. The high integration and low power of SynthePHY
make it suitable for rack-mounted radios, as well as remote radio units
where size and power are highly constrained.

SynthePHY integrates PMC-Sierra’s robust SERDES technology to support
CPRI, OBSAI, and IR remote radio unit (RRU) designs. The SERDES rates
are programmable from 614.4Mbps to 6.144Gbps data rates and are suitable
for driving cable, backplane or optical modules making it possible to
share a common radio design for rack-mount and remote radios. SynthePHY
includes the accurate delay calibration circuitry needed for measuring
delays to satisfy CPRI and OBSAI synchronization requirements. This
feature reduces the effort required to develop calibration circuits and
provides the accuracy needed for multi-hop remote radio systems.

SynthePHY has 18 differential low voltage 50ohm drivers with
programmable output levels and phase control, and supports clock rates
up to 1.6GHz. In addition, each device has 12 single-ended LVCMOS
drivers with programmable divider and phase control, and supports clock
rates up to 307.2MHz. Integrated jitter of less than 200fs and phase
noise floor below -160dBc/Hz on 1GHz differential output clocks and
250MHz LVCMOS output clocks can be achieved using a low-cost VCXO
reference. The high number of flexible outputs and low-noise
characteristic of SynthePHY enables scaling from single-sector designs
to multi-sector, multi-standard, and MIMO designs.

The SynthePHY family includes the following devices:

Device Features
PM7501 SynthePHY 6G
  • Dual 6Gb/s SERDES
  • 18 differential and 12 LVCMOS outputs
  • 13×13 mm body, 225 lead, 0.8 mm pitch Flip Chip CSP (fcCSP)
PM7520 SyntheCLK
  • 18 differential and 12 LVCMOS outputs
  • 12×12 mm body, 196 lead, 0.8 mm pitch Flip Chip CSP (fcCSP)

Availability, Packaging, and Customer Support

PMC-Sierra’s SynthePHY family is available now. The devices are rated
for industrial temperature operation (-40 to +85 degrees Celsius). A
comprehensive support package, including datasheets, application notes
and reference design material is available at,
or contact PMC-Sierra at

–(PMC-Sierra, Inc. News Release)–

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